By Sridhar Gangadharan,Sanjay Churiwala

This booklet serves as a hands-on consultant to timing constraints in built-in circuit design.  Readers will learn how to maximize functionality in their IC designs, by means of specifying timing standards correctly.  assurance comprises key points of the layout circulation impacted by way of timing constraints, together with synthesis, static timing research and site and routing.  options wanted for specifying timing standards are defined intimately after which utilized to precise levels within the layout move, all in the context of Synopsys layout Constraints (SDC), the industry-leading structure for specifying constraints.

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Constraining Designs for Synthesis and Timing Analysis: A Practical Guide to Synopsys Design Constraints (SDC) by Sridhar Gangadharan,Sanjay Churiwala


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